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Role of grain boundary percolative defects and localized trap generation on the reliability statistics of high-κ gate dielectric stacks

หน่วยงาน Nanyang Technological University, Singapore

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ชื่อเรื่อง : Role of grain boundary percolative defects and localized trap generation on the reliability statistics of high-κ gate dielectric stacks
นักวิจัย : Raghavan, Nagarajan , Pey, Kin Leong , Shubhakar, K. , Wu, X. , Liu, W. H. , Bosman, Michel
คำค้น : DRNTU::Engineering::Electrical and electronic engineering
หน่วยงาน : Nanyang Technological University, Singapore
ผู้ร่วมงาน : -
ปีพิมพ์ : 2555
อ้างอิง : Raghavan, N., Pey, K. L., Shubhakar, K., Wu, X., Liu, W. H., & Bosman, M. (2012). Role of grain boundary percolative defects and localized trap generation on the reliability statistics of high-κ gate dielectric stacks. 2012 IEEE International Reliability Physics Symposium (IRPS), pp.6A.1.1-6A.1.11. , http://hdl.handle.net/10220/16389 , http://dx.doi.org/10.1109/IRPS.2012.6241862
ที่มา : -
ความเชี่ยวชาญ : -
ความสัมพันธ์ : -
ขอบเขตของเนื้อหา : -
บทคัดย่อ/คำอธิบาย :

Grain boundary (GB) microstructural defects in polycrystalline high-? dielectric thin films may cause localized non-random trap generation during the percolation breakdown (BD) process. We study the effect of this non-random trap generation on the reliability statistics of the metal gate (MG) - high-κ (HK) stack. For the first time, we propose a fundamental physics-based Kinetic Monte Carlo (KMC) model considering the thermodynamics and kinetics of bond breaking, generation of oxygen vacancy traps and simulating the trap evolution process in a dual-layer HK - interfacial layer (IL) gate stack. Our simulation model helps explain the non-Weibull distribution trends for time dependent dielectric breakdown data (TDDB) and also determine the sequence of BD which is found to be independent of the thickness ratio of (tHK : tIL) and gate voltage (Vg). Results show that the IL layer is always more susceptible to early percolation and circuit level failure may only be caused by multiple soft BD (SBD) events in the IL layer. The possibility of a sequential IL → HK breakdown is very unlikely for operating voltage conditions of Vop = 1V.

บรรณานุกรม :
Raghavan, Nagarajan , Pey, Kin Leong , Shubhakar, K. , Wu, X. , Liu, W. H. , Bosman, Michel . (2555). Role of grain boundary percolative defects and localized trap generation on the reliability statistics of high-κ gate dielectric stacks.
    กรุงเทพมหานคร : Nanyang Technological University, Singapore.
Raghavan, Nagarajan , Pey, Kin Leong , Shubhakar, K. , Wu, X. , Liu, W. H. , Bosman, Michel . 2555. "Role of grain boundary percolative defects and localized trap generation on the reliability statistics of high-κ gate dielectric stacks".
    กรุงเทพมหานคร : Nanyang Technological University, Singapore.
Raghavan, Nagarajan , Pey, Kin Leong , Shubhakar, K. , Wu, X. , Liu, W. H. , Bosman, Michel . "Role of grain boundary percolative defects and localized trap generation on the reliability statistics of high-κ gate dielectric stacks."
    กรุงเทพมหานคร : Nanyang Technological University, Singapore, 2555. Print.
Raghavan, Nagarajan , Pey, Kin Leong , Shubhakar, K. , Wu, X. , Liu, W. H. , Bosman, Michel . Role of grain boundary percolative defects and localized trap generation on the reliability statistics of high-κ gate dielectric stacks. กรุงเทพมหานคร : Nanyang Technological University, Singapore; 2555.