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Study of charge distribution and charge loss in dual-layer metal-nanocrystal-embedded high-κ/SiO2 gate stack

หน่วยงาน Nanyang Technological University, Singapore

รายละเอียด

ชื่อเรื่อง : Study of charge distribution and charge loss in dual-layer metal-nanocrystal-embedded high-κ/SiO2 gate stack
นักวิจัย : Lwin, Z. Z. , Pey, Kin Leong , Zhang, Q. , Bosman, Michel , Liu, Q. , Gan, C. L. , Singh, P. K. , Mahapatra, S.
คำค้น : DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
หน่วยงาน : Nanyang Technological University, Singapore
ผู้ร่วมงาน : -
ปีพิมพ์ : 2555
อ้างอิง : Lwin, Z. Z., Pey, K. L., Zhang, Q., Bosman, M., Liu, Q., Gan, C. L., et al. (2012). Study of charge distribution and charge loss in dual-layer metal-nanocrystal-embedded high-κ/SiO2 gate stack. Applied Physics Letters, 100(19), 193109-. , 0003-6951 , http://hdl.handle.net/10220/9128 , http://dx.doi.org/10.1063/1.4712565
ที่มา : -
ความเชี่ยวชาญ : -
ความสัมพันธ์ : Applied physics letters
ขอบเขตของเนื้อหา : -
บทคัดย่อ/คำอธิบาย :

In this work, we present a comprehensive experimental study of charge loss mechanisms in a dual-layer metal nanocrystal (DL-MNC) embedded high-κ/SiO2 gate stack. Kelvin force microscopy characterization reveals that the internal-electric-field assisted tunneling could be a dominant charge loss mechanism in DL devices that mainly depends on the charge distribution in two MNC-layers and inter-layer dielectric (ILD) thickness between the two layers of nanocrystals. Our findings suggest that an optimized DL-MNCs embedded memory cell could be achieved by defining the ILD thickness larger than the average MNC-spacing for enhancement of retention ability in MNC embedded gate stacks. It implies the possibility of reducing MNC spacing in DL structure of scaled memory devices by controlling the thickness of ILD.

บรรณานุกรม :
Lwin, Z. Z. , Pey, Kin Leong , Zhang, Q. , Bosman, Michel , Liu, Q. , Gan, C. L. , Singh, P. K. , Mahapatra, S. . (2555). Study of charge distribution and charge loss in dual-layer metal-nanocrystal-embedded high-κ/SiO2 gate stack.
    กรุงเทพมหานคร : Nanyang Technological University, Singapore.
Lwin, Z. Z. , Pey, Kin Leong , Zhang, Q. , Bosman, Michel , Liu, Q. , Gan, C. L. , Singh, P. K. , Mahapatra, S. . 2555. "Study of charge distribution and charge loss in dual-layer metal-nanocrystal-embedded high-κ/SiO2 gate stack".
    กรุงเทพมหานคร : Nanyang Technological University, Singapore.
Lwin, Z. Z. , Pey, Kin Leong , Zhang, Q. , Bosman, Michel , Liu, Q. , Gan, C. L. , Singh, P. K. , Mahapatra, S. . "Study of charge distribution and charge loss in dual-layer metal-nanocrystal-embedded high-κ/SiO2 gate stack."
    กรุงเทพมหานคร : Nanyang Technological University, Singapore, 2555. Print.
Lwin, Z. Z. , Pey, Kin Leong , Zhang, Q. , Bosman, Michel , Liu, Q. , Gan, C. L. , Singh, P. K. , Mahapatra, S. . Study of charge distribution and charge loss in dual-layer metal-nanocrystal-embedded high-κ/SiO2 gate stack. กรุงเทพมหานคร : Nanyang Technological University, Singapore; 2555.