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Design of low-power high-speed truncation-error-tolerant adder and its application in digital signal processing

หน่วยงาน Nanyang Technological University, Singapore

รายละเอียด

ชื่อเรื่อง : Design of low-power high-speed truncation-error-tolerant adder and its application in digital signal processing
นักวิจัย : Zhu, Ning , Goh, Wang Ling , Zhang, Weija , Yeo, Kiat Seng , Kong, Zhi Hui
คำค้น : DRNTU::Engineering::Electrical and electronic engineering.
หน่วยงาน : Nanyang Technological University, Singapore
ผู้ร่วมงาน : -
ปีพิมพ์ : 2552
อ้างอิง : Zhu, N., Goh, W. L., Zhang, W., Yeo, K. S., & Kong, Z. H. (2009). Design of Low-Power High-Speed Truncation-Error-Tolerant Adder and Its Application in Digital Signal Processing. IEEE Transactions On Very Large Scale Integration (VLSI) Systems. pp, 1-5. , 1063-8210 , http://hdl.handle.net/10220/6241 , http://dx.doi.org/10.1109/TVLSI.2009.2020591
ที่มา : -
ความเชี่ยวชาญ : -
ความสัมพันธ์ : IEEE transactions on very large scale integration (VLSI) systems
ขอบเขตของเนื้อหา : -
บทคัดย่อ/คำอธิบาย :

In modern VLSI technology, the occurrence of all kinds of errors has become inevitable. By adopting an emerging concept in VLSI design and test, error tolerance (ET), a novel error-tolerant adder (ETA) is proposed. The ETA is able to ease the strict restriction on accuracy, and at the same time achieve tremendous improvements in both the power consumption and speed performance. When compared to its conventional counterparts, the proposed ETA is able to attain more than 65% improvement in the Power-Delay Product (PDP). One important potential application of the proposed ETA is in digital signal processing systems that can tolerate certain amount of errors.

บรรณานุกรม :
Zhu, Ning , Goh, Wang Ling , Zhang, Weija , Yeo, Kiat Seng , Kong, Zhi Hui . (2552). Design of low-power high-speed truncation-error-tolerant adder and its application in digital signal processing.
    กรุงเทพมหานคร : Nanyang Technological University, Singapore.
Zhu, Ning , Goh, Wang Ling , Zhang, Weija , Yeo, Kiat Seng , Kong, Zhi Hui . 2552. "Design of low-power high-speed truncation-error-tolerant adder and its application in digital signal processing".
    กรุงเทพมหานคร : Nanyang Technological University, Singapore.
Zhu, Ning , Goh, Wang Ling , Zhang, Weija , Yeo, Kiat Seng , Kong, Zhi Hui . "Design of low-power high-speed truncation-error-tolerant adder and its application in digital signal processing."
    กรุงเทพมหานคร : Nanyang Technological University, Singapore, 2552. Print.
Zhu, Ning , Goh, Wang Ling , Zhang, Weija , Yeo, Kiat Seng , Kong, Zhi Hui . Design of low-power high-speed truncation-error-tolerant adder and its application in digital signal processing. กรุงเทพมหานคร : Nanyang Technological University, Singapore; 2552.